• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
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  • 优先权
    • 专利摘要:
    The present invention relates to a method, apparatus, and storage device for improving performance in phase-change memory (PCM) with read-before-write. Each write of the PCM is preceded by a read to avoid write cancellations with urgent reads from nearby locations. For each write, a large block of data is read from a PCM, for example an entire partition, before writing to the PCM. The cached copy of the large data block is kept in a control device for the duration of the writing. A read request from the loaded region in advance is provided from the cached copy, thereby preventing any read interruptions during the write operation.
    公开号:FR3023960A1
    申请号:FR1556133
    申请日:2015-06-30
    公开日:2016-01-22
    发明作者:Cyril Guyot；Robert Eugeniu Mateescu；Dejan Vucinic
    申请人:HGST Netherlands BV；
    IPC主号:
    专利说明:

    [0001] BACKGROUND OF THE INVENTION The present invention generally relates to the field of data storage and more particularly to a field of data storage. method, apparatus, and storage device for improving the performance of the PCMs with read before write to avoid write cancellations with urgent readings of near locations.
    [0002] Description of the Related Art [002] Phase change memory (PCM) is a promising medium for the next generation of non-volatile solid state memory. One of the idiosyncrasies of PCM is the much longer time required to write a bit than to read it; the write operations are about fifty times longer than those of reading. [003] While a write operation is in progress, access for reading or writing to a relatively large memory region of the chip, such as a chip region called a partition, is blocked. This means that a read request for a partition being written must be put on hold until the end of the write is potentially 50 times longer than the usual read latency. Another possibility is to interrupt the write operation to read in a suitable time before resuming the write operation again. [4] There is a need to provide a powerful and efficient mechanism for improving the performance of data writing for Solid State Drives (SSDs), for example, including phase change memory (PCM). [5] In the following description and claims, the term phase-change memory (PCM) is intended to be broadly understood and includes memory devices having a large asymmetry between read and write latency with reads faster than the scriptures.
    [0003] SUMMARY OF THE INVENTION [6] Some aspects of the present embodiments include providing a method, an apparatus, and a storage device for improving the performance of phase-change memories (PCMs) with read-before-write . Other important aspects are to provide a method, apparatus and storage device substantially without negative effect and providing a solution to certain disadvantages of the prior art arrangements. [7] In summary, a method, an apparatus and a storage device are provided for improving the performance of the PCMs with read before write. Each write of the PCM is preceded by a read to avoid write cancellations with urgent reads from nearby locations. For each write, a large block of data is read from a PCM, for example an entire partition, before writing to the PCM. The cached copy of the large data block is kept in a control device for the duration of the writing. A read request from the loaded region in advance is provided from the cached copy, thereby preventing any read interruptions during the write operation. Brief Description of the Drawings [008] The present invention in conjunction with the aforementioned objects and advantages and others may be understood from the following detailed description of the preferred embodiments of the invention illustrated in the drawings, wherein: FIG. 1 is a functional block diagram illustrating a system for improving performance methods of read-write phase change memories, for example, solid state drives (SSDs) according to preferred embodiments. ; FIG. 2 is a flowchart illustrating examples of operation of the system of FIG. 1 for improving the performance of phase-change memories with read-before-write, for example for solid-state readers (SSDs) according to the modes. preferred embodiments; FIG. 3 illustrates a data write typical of the prior art on certain known memory devices; FIG. 4 illustrates a data write on a phase change memory according to the preferred embodiments; Figure 5 is a block diagram illustrating a computer program product according to the preferred embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0014] In the following detailed description of the embodiments of the invention, reference is made to the accompanying drawings which illustrate exemplary embodiments that can be used to practice the invention. It should be understood that other embodiments may be used and that structural changes may be made without departing from the scope of the invention. According to the features of the preferred embodiments, a method, an apparatus and a storage device are provided for improving the performance comprising the improved writing of data on a phase change memory, for example for state-of-the-art readers. solid (SSDs). The enhanced data writing is carried out by performing a read before writing data to the phase change memory of preferred embodiments. According to the characteristics of the preferred embodiments, each write on a phase change memory (PCM) is preceded by a reading kept in the control device during the duration of the writing, so that a request Read from the region loaded in advance is provided from the cached copy, thereby avoiding interrupting the write operation for a read. Referring now to the drawings, FIG. 1 illustrates an exemplary system for implementing improved data writing methods for a phase change memory (PCM), for example for solid state drives (SSDs). ) generally designated by reference 100 according to the preferred embodiments. The system 100 includes a solid state reader 102 and a host computer 104. The SSD 102 includes a controller 106 (CPU) 106 including a cache memory 107 for storing the previously loaded read data blocks. according to the preferred embodiments. The SSD 102 includes the controller CPU 106 coupled to a main memory or dynamic random access memory (DRAM) 108, a phase change memory (PCM) control code 110, and an interface control 112. phase change memory (PCM). The SSD 102 includes a plurality of phase change memory (PCM) devices or chips 114 coupled to the PCM interface control 112 coupled to the controller 106. The SSD 102 includes a host interface 116 coupled between the host computer 104 and the interface control 112 of the controller 106 and phase change memory (PCM). Although the exemplary embodiment of the system 100 is described in the context of a solid-state reader 102, it should be understood that the principles of the preferred embodiments are advantageously applied to other types of hardware. data storage devices including phase change memory (PCM) and various memory arrangements including memory devices having a large asymmetry between read and write latency. The system 100 is illustrated in simplified form sufficient to include preferred embodiments. For example, the controller 106 may be fabricated on one or more integrated circuit chips and is suitably programmed to implement the methods according to the preferred embodiments. The SSD 102 implements an improved data write for the phase change memory (PCM) using a read before write according to the preferred embodiments. The control CPU 106 of the SSD 102 includes firmware, such as a PCM control code 110 according to the preferred embodiments, and is coupled to a PCM interface control block 112. Information relative to the PCM interface control block 112 is provided to the firmware of the control device 106 of the SSD 102, for example from a PCM control code 110. FIG. 2 illustrates a flowchart illustrating exemplary operations of the system of FIG. 1 to improve performance including improved data writing, for example for solid state readers (SSDs) according to the preferred embodiments. . As indicated in a block 200, a data write starts according to the preferred embodiments, for example in response to a received write request. Before writing data on the PCM, a large block of data is read from a data region loaded in advance of the PCM, before writing data as indicated in block 202. [ 0024] The large data block read from the pre-loaded data region is stored on the PCM controller as indicated in a block 204. As indicated in block 206, the large block Read data is retained for the duration of the write operation. As indicated in block 208, when the data write operation is performed, one or more read requests for the pre-loaded data region are optionally received during writing. Each received request is processed from the cached data copy from the data region loaded in advance into the controller without writing interruption, as indicated by a block 210 according to the characteristics of the data. preferred embodiments. FIG. 3 illustrates a data write typical of the prior art on certain known memory devices. A reading around interrupts typical data writing and another write is performed after reading around. FIG. 4 illustrates a data write on a phase change memory generally designated by the reference 400 according to the preferred embodiments. Before writing data, a larger amount of data is read as indicated at line 402 comprising a large block of data. During the write operation, a read around as indicated at line 404 does not interrupt the write operation. Figure 5 illustrates a manufactured article or computer program product 500 of the preferred embodiments. The computer program product 500 includes a computer readable record medium 502, such as a floppy disk drive, a high capacity read-only memory in the form of an optical reading compact disc or a CD-ROM. ROM, tape or other similar computer program product. The computer readable record medium 502 stores the program means or control code 504, 506, 508, 510 on the medium 502 to implement the performance improvement methods for writing data to a data carrier. phase change memory (PCM) comprising a read before write according to the preferred embodiments in the system 100 of FIG. 1. A sequence of program instructions or a logical set of one or more interconnected modules defined by the stored program means or the control code 504, 506, 508, 510, direct the SSD controller 106 of the system 100 to improve performance with the PCM data write of preferred embodiments. Although the present invention has been described with reference to the details of the embodiments of the invention illustrated in the drawing, these details are not intended to limit the scope of the invention as claimed in the appended claims.
    权利要求:
    Claims (17)
    [0001]
    REVENDICATIONS1. A method of writing data to a phase change memory (PCM) comprising: starting a data write; reading a data block from a read data region loaded in advance from the PCM before writing data to the PCM; and maintaining a cached copy of the read data block in a controller during the duration of the data write operation.
    [0002]
    The data writing method according to claim 1, wherein starting a data write comprises receiving a write request.
    [0003]
    A data writing method according to claim 2, wherein reading the data block from the read data region loaded in advance from the PCM comprises reading an entire partition from the PCM, in response to the received write request.
    [0004]
    A data writing method according to claim 1, comprising receiving a read request from the read data region loaded in advance during the write operation, performing the read request at from the cached data copy in the controller, thereby preventing any read interruptions during the data write operation.
    [0005]
    The data writing method according to claim 4, comprising receiving a second read request from the read data region read in advance during the write operation, performing the second request for reading from the cached data copy in the controller, thereby preventing any read interruptions during the data write operation. 10
    [0006]
    A data memory apparatus on a phase change memory (PCM) comprising: a controller; said controller starting a data write; said controller reading a block of data from a read data region loaded in advance from the PCM before writing data to the PCM; and said controller retaining a cached copy of the data block for the duration of the data write operation.
    [0007]
    A data writing apparatus according to claim 6, comprising a control code stored on a non-transitory computer readable medium and wherein said controller uses said control code for writing data. 15
    [0008]
    The data writing apparatus according to claim 6, comprising said controller receiving a write request and starting the data write.
    [0009]
    The data writing apparatus according to claim 6, wherein said controller reading the data block from the read data region loaded in advance from the PCM comprises said control device reading a partition. from the PCM, in response to the received write request.
    [0010]
    The data writing apparatus according to claim 6, comprising said controller receiving a read request from the read data region read in advance during the write operation, said controller performing the read request from the cached copy in the controller, thereby preventing any read interruptions during the data write operation.
    [0011]
    The data writing apparatus according to claim 10, wherein said controller receives a second read request from the read data region read in advance during the write operation, said controller performing the second read request from the cached copy in the controller, thereby preventing any read interruptions during the data write operation.
    [0012]
    A data storage device comprising: a phase change memory (PCM); a controller for writing data to the phase change memory (PCM); said controller starting a data write; said controller reading a block of data from a read data region loaded in advance from the PCM before writing data to the PCM; and said controller retaining a cached copy of the data block for the duration of the data write operation.
    [0013]
    The data storage device according to claim 12, comprising a control code stored on a non-transitory computer readable medium and wherein said controller uses said control code for writing data.
    [0014]
    The data storage device according to claim 12, comprising said controller receiving a write request and starting the data write. 5
    [0015]
    The data storage device according to claim 12, wherein said controller reading the data block from the read data region loaded in advance from the PCM comprises said controller reading an entire partition to from the PCM, in response to the received write request.
    [0016]
    The data storage device according to claim 12, comprising said controller receiving a read request from the read data region read in advance during the write operation, said controller performing the request for read from the cached copy in the control device, thereby preventing any read interruptions during the data write operation.
    [0017]
    The data storage device according to claim 16, wherein said controller receives a second read request from the read data region loaded in advance during the write operation, said controller performing the second read request from the cached copy in the controller, thereby preventing any read interruptions during the data write operation.
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    法律状态:
    2016-06-27| PLFP| Fee payment|Year of fee payment: 2 |
    2017-05-11| PLFP| Fee payment|Year of fee payment: 3 |
    2018-05-11| PLFP| Fee payment|Year of fee payment: 4 |
    2019-05-10| PLFP| Fee payment|Year of fee payment: 5 |
    2020-04-24| TP| Transmission of property|Owner name: WESTERN DIGITAL TECHNOLOGIES, INC., US Effective date: 20200319 |
    2020-05-12| PLFP| Fee payment|Year of fee payment: 6 |
    2021-05-13| PLFP| Fee payment|Year of fee payment: 7 |
    优先权:
    申请号 | 申请日 | 专利标题
    US14/332,197|US9471227B2|2014-07-15|2014-07-15|Implementing enhanced performance with read before write to phase change memory to avoid write cancellations|
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